EMC Design Principles for High-Speed PCBs

Principle 1: PCB clock frequencies exceeding 5 MHz or signal rise times less than 5 ns generally require a multi-layer board design.

Reason: Using a multi-layer board design effectively controls signal loop area.

Principle 2: For multi-layer boards, critical routing layers (those containing clock lines, bus lines, interface signal lines, RF lines, reset signals, chip select signals, and various control signals) should be adjacent to a complete ground plane, preferably between two ground planes.

Reason: Critical signal lines are generally highly radiating or extremely sensitive. Routing them close to the ground plane can reduce their signal loop area, lowering their radiation intensity or improving their anti-interference capabilities.

Principle 3: For single-layer boards, ground wraps should be placed on both sides of critical signal lines.

Reason: Ground wraps on both sides of critical signal lines can reduce the signal loop area and prevent crosstalk between signal lines.

Principle 4: For double-layer boards, a large ground plane should be laid on the projected plane of the critical signal lines, or ground wraps should be punched in the same way as for single-layer boards.

Reason: Similar to the proximity of critical signals to the ground plane in multilayer boards.

Rule 5: In multilayer boards, the power plane should be recessed by 5H-20H relative to its adjacent ground plane (H is the distance between the power and ground planes).

Rule: Retracting the power plane relative to its return ground plane effectively suppresses edge radiation.

Rule 6: The projection of the routing layer should be within the return plane area.

Rule: If the routing layer is not within the projection area of the return plane, it will cause edge radiation and increase the signal loop area, thereby increasing differential mode radiation.

Rule 7: In multilayer boards, signal lines exceeding 50MHz should be avoided on the top and bottom layers.

Rule: It is best to route high-frequency signals between two plane layers to suppress their radiation into space.

Rule 8: For boards with an operating frequency greater than 50MHz, if the second and second-to-last layers are routing layers, the top and bottom layers should be covered with ground copper foil.

Rule: It is best to route high-frequency signals between two plane layers to suppress their radiation into space.

Principle 9: In a multi-layer board, the main working power plane (the most widely used power plane) should be adjacent to its ground plane.

Reason: Having power and ground planes adjacent to each other effectively reduces the power circuit loop area.

Principle 10: In a single-layer board, a ground trace must be run adjacent to and parallel to the power trace.

Reason: Reduces the power current loop area.

Principle 11: In a two-layer board, a ground trace must be run adjacent to and parallel to the power trace.

Reason: Reduces the power current loop area.

Principle 12: In a layered design, avoid adjacent wiring layers. If adjacent wiring layers are unavoidable, increase the spacing between them and reduce the spacing between a wiring layer and its signal loop.

Reason: Parallel signal traces on adjacent wiring layers can cause signal crosstalk.

Principle 13: Adjacent planes should avoid overlapping projections.

Reason: When projections overlap, the coupling capacitance between layers can cause noise to couple between layers.

Principle 14: When designing a PCB layout, adhere to the principle of placing circuits in a straight line along the signal flow direction and avoid looping circuits as much as possible.

Reason: To prevent direct signal coupling, which can affect signal quality.

Principle 15: When multiple module circuits are placed on the same PCB, digital and analog circuits, as well as high-speed and low-speed circuits, should be laid out separately.

Reason: To prevent mutual interference between digital, analog, high-speed, and low-speed circuits.

Principle 16: When a circuit board contains high-, medium-, and low-speed circuits, the high- and medium-speed circuits should be placed away from interfaces.

Reason: To prevent high-frequency circuit noise from radiating outward through interfaces.

Principle 17: Energy storage and high-frequency filter capacitors should be placed near unit circuits or devices with large current fluctuations (such as the input and output terminals of power modules, fans, and relays).

Reason: The presence of energy storage capacitors can reduce the loop area of high-current loops.

Principle 18: The filter circuit at the power input of a circuit board should be placed close to the interface.

Reason: To prevent re-coupling of already filtered lines.

Principle 19: On the PCB, the filtering, protection, and isolation components of the interface circuit should be placed close to the interface.

Reason: This effectively achieves protection, filtering, and isolation.

Principle 20: If both filtering and protection circuits are present at an interface, the protection should be placed first, followed by filtering.

Reason: The protection circuit is used to suppress external overvoltage and overcurrent. If the protection circuit is placed after the filter circuit, the filter circuit will be damaged by the overvoltage and overcurrent.

Principle 21: During layout, ensure that the input and output lines of the filtering circuit (filter), isolation circuit, and protection circuit are not coupled with each other.

Reason: Coupling of the input and output traces of these circuits will weaken the filtering, isolation, or protection effects.

Principle 22: If a "clean ground" is designed for the interface on the board, the filtering and isolation components should be placed on the isolation strip between the "clean ground" and the working ground.

Reason: Avoid coupling between filtering or isolation components through planes, which would weaken their effectiveness.

Principle 23: Do not place any other components on a "clean ground" other than filtering and protection components. Reason: The purpose of a "clean ground" is to minimize interface radiation, and a "clean ground" is highly susceptible to coupling from external interference. Therefore, no other unrelated circuits or components should be placed on a "clean ground."

Principle 24: Keep high-radiation components such as crystals, crystal oscillators, relays, and switching power supplies at least 1000 mils away from board interface connectors. Reason: Interference can be radiated directly outward or coupled outward by currents on outgoing cables.

Principle 25: Keep sensitive circuits or components (such as reset circuits and watchdog circuits) at least 1000 mils away from all edges of the board, especially those near board interfaces.

Reason: Areas like board interfaces are most susceptible to coupling from external interference (such as static electricity), and sensitive circuits like reset circuits and watchdog circuits can easily cause system malfunctions.

Principle 26: Critical signal traces such as clocks, buses, and RF lines, as well as other parallel traces on the same layer, should adhere to the 3W principle.

Reason: To prevent crosstalk between signals.

Principle 27: The pads of surface-mount fuses, ferrite beads, inductors, and tantalum capacitors used in power supplies with a current ≥1A should be connected to the plane layer with at least two vias.

Reason: To reduce the equivalent impedance of the vias.

Principle 28: Differential signal traces should be routed on the same layer, of equal length, and in parallel, maintaining consistent impedance. No other traces should be placed between differential traces.

Reason: To ensure that the common-mode impedance of the differential pair is equal, improving their anti-interference capabilities.

Principle 29: Critical signal traces must not cross partitions (including gaps in the reference plane caused by vias and pads).

Reason: Routing across partitions increases the signal loop area.

Principle 30: When a signal line crossing a ground plane split is unavoidable, it is recommended to use a bridging capacitor near the signal split. The capacitance should be 1nF.

Reason: Signal splits often increase the loop area, and using a bridge grounding method artificially creates a signal loop.

Principle 31: Avoid routing irrelevant signal traces beneath filters (filter circuits) on a single board.

Reason: Distributed capacitance weakens the filter’s filtering effectiveness.

Principle 32: The input and output signal traces of a filter (filter circuit) must not run parallel or cross each other.

Reason: Avoid direct noise coupling between traces before and after the filter.

Principle 33: Critical signal traces must be at least 3H from the edge of the reference plane (H is the height of the trace from the reference plane).

Reason: Suppress edge radiation effects.

Principle 34: For grounded components on metal housings, grounding copper should be placed on the top layer of the projected area.

Reason: Distributed capacitance between the metal housing and the grounding copper can suppress external radiation and improve noise immunity.

Principle 35: On single-layer or double-layer boards, pay attention to "minimizing loop area" when routing.

Reason: The smaller the loop area, the less external radiation the loop emits and the stronger the anti-interference capability.

Principle 36: When signal lines (especially critical signal lines) change layers, ground vias should be designed near the layer change vias.

Reason: This reduces the signal loop area.

Principle 37: Clock lines, bus lines, RF lines, etc.: Keep strong radiating signal lines away from interface outbound signal lines.

Reason: This prevents interference from strong radiating signal lines from coupling onto outbound signal lines and radiating outward.

Principle 38: Keep sensitive signal lines such as reset signals, chip select signals, and system control signals away from interface outbound signal lines.

Reason: Interface outbound signal lines often carry external interference, which, when coupled onto sensitive signal lines, can cause system malfunction.

Principle 39: On single- and double-layer boards, the routing of filter capacitors should be filtered by the filter capacitors before reaching the device pins.

Reason: The power supply voltage is filtered before being supplied to the IC. Noise fed back to the power supply by the IC is also filtered out by the capacitor.

Principle 40: In single- or double-sided boards, if the power supply traces are long, decoupling capacitors should be added to ground every 3000 mils. The capacitance should be 10µF + 1000pF.

Reason: To filter out high-frequency noise on the power supply line.

Principle 41: The ground and power supply wires of the filter capacitor should be as thick and short as possible.

Reason: Equivalent series inductance lowers the capacitor’s resonant frequency, weakening its high-frequency filtering effectiveness.

Principle 42: Filter capacitors for IC filtering should be placed as close as possible to the chip’s power pins.

Reason: The closer the capacitor is to the pin, the smaller the high-frequency loop area, thus reducing radiation.

Principle 43: The initial series matching resistor should be placed close to its signal output terminal.

Reason: The purpose of the series matching resistor at the beginning is to ensure that the sum of the output impedance of the chip output and the impedance of the series resistor equals the characteristic impedance of the trace. Placing the matching resistor at the end does not satisfy this equation.

Principle 44: PCB traces must not have right-angle or sharp-angle traces.

Reason: Right-angle traces cause impedance discontinuities, which can lead to signal transmission, resulting in ringing or overshoot, and strong EMI radiation.

Principle 45: Avoid layering adjacent routing layers whenever possible. If this is unavoidable, try to keep traces on two routing layers perpendicular to each other or parallel to each other, with the length of the traces less than 1000 mil.

Reason: Reduce crosstalk between parallel traces.

Principle 46: If the board has internal signal routing layers, route critical signal lines such as clocks on inner layers (preferably the preferred routing layer).

Reason: Routing critical signals on inner routing layers provides shielding.

Principle 47: It is recommended to place ground traces on both sides of the clock line, with ground vias drilled every 3000 mil.

Reason: Ensure that the potential of each point on the ground wire is equal.